This invention is in the field of power management and control systems. Embodiments are more specifically directed to control of a digital-to-analog converter input to power converters and the like.
The power consumed by modern electronic systems is an increasingly important factor for a variety of reasons. One such reason is the increasing widespread use of mobile and other battery-powered systems, such as smartphones, tablet computers, wearable devices, and indeed implantable medical devices, in which conservation of battery power is important. In addition, the usable system life of many networked sensors and controllers in the so-called Internet of Things (IoT) may be limited by battery life, particularly when implemented in remote locations. Power consumption is of importance even for electronic computing systems powered from line power, for thermal considerations and also from an energy conservation standpoint.
These concerns have motivated the implementation of real-time power management systems in many modern computing and communications. Conventional power management systems produce regulated bias and power supply voltages to the integrated circuits and other functions within the system. These power management systems often include control systems for closely controlling the regulated voltages, for example by varying the voltages to be applied to particular circuit functions in response to current system conditions and operational status. One common conventional power management technique in microprocessor systems (e.g., such as in personal computers) is referred to as “Adaptive Voltage Scaling”. According to this approach, a hardware performance manager circuit monitors the computational workload of the system central processing unit (CPU), and communicates that workload level to a clock management function that varies the processor clock frequency in response. For example, if the CPU workload is light, the processor clock frequency can be reduced without affecting overall system performance. According to Adaptive Voltage Scaling, the power management system adjusts power supply voltages in real-time according to the processor clock frequency or a control signal from the hardware performance manager, so that the power supply voltages applied to the relevant circuit functions are scaled with the processor clock rate to be near the minimum necessary to operate at that clock rate. Reduction of the power supply voltage of course reduces power consumption.
In real-time power management, the rapid and accurate response of power controllers to changes in the desired output voltage is desirable. However, impedances in conventional power converter systems limit this response. FIG. 1a illustrates an example of a conventional power converter system. In this system, input comparator 2 produces an error signal corresponding to the difference between output voltage Vo and an analog input control signal Vdac issued by digital-to-analog converter (DAC) 10 in response to digital data from a hardware performance manager or the like. This input control signal Vdac indicates the desired level of output voltage Vo. The error signal from comparator 2 is amplified by transconductance amplifier 3, and applied to the positive input of differential amplifier 4. Impedance Zi is provided to compensate the loop for stability and to tune the performance of the system, as known in the art. The output of amplifier 4 is applied to on-time control and power stage 5, which in turn produces output voltage Vo. The voltage drop across the DC resistance DCR of power stage 5 is monitored via amplifier 6, which presents a signal isum proportional to the output current io of power stage 5 to the negative input of amplifier 4.
Ideally in the system of FIG. 1a, the output voltage Vo would precisely and immediately follow changes in the input control signal Vdac. But propagation delays and system dynamics in actual physical systems limit the rate of change at which the voltage regulator system of FIG. 1a can respond. In the schematic diagram of FIG. 1a, these system dynamics are shown by way of analog-domain impedance Zi present at the output of amplifier 3, appearing as a resistive (DC) and capacitive (AC) coupling to system ground. At the output stage of this system, series inductance Lo is driven at the output of power stage 5, at which output or load impedance Zo (e.g., appearing as parallel resistive and RC coupling to ground). This output stage adds poles, zeroes, and delay to the response of the power converter to changes in the voltage Vdac from DAC 10.
FIGS. 1b and 1c illustrate an example of the non-ideal response of a power converter system such as that shown in FIG. 1a to the input control signal Vdac requesting a change in output voltage Vo from a voltage V1 to a voltage V2 over a time interval from time t1 to time t2. As typical in the art, this change is intended to be applied as a controlled linear increase in the input control signal Vdac presented by DAC 10 over the slew interval, in this case at a selected slope, commonly referred to as a “slew” rate. As evident in FIG. 1b, output voltage Vo lags the linear slew of input control signal Vdac, beginning with the initial transition, reaching the desired voltage level well after the desired time. FIG. 1c illustrates the corresponding response in output current io over this slew event. Ideally for this linear slew, output current io would be a square pulse at a desired charging current level iCHG over the transition interval from time t1 to time t2, as shown by plot io (ideal) in FIG. 1c. However, the output stage inductance Lo in the power converter system of FIG. 1a limits the rate of change of the output current io for a given input voltage, as indicated by the lag between plot io (ideal) and plot io (actual) in FIG. 1c. At the trailing edge of the current pulse, the output stage inductance Lo in the power converter system of FIG. 1a prohibits an instantaneous change in current io, and results in a lagging decay in plot io (actual) relative to the ideal response shown by plot io (ideal). In addition, the output or load impedance Zo delays output voltage Vo from reaching the setpoint level indicated by input control signal Vdac by the desired time t2. As shown in FIG. 1b, in some conventional systems, the lag in output current io caused by these system dynamics can result in significant overshoot of output voltage Vo beyond the desired level indicated by control signal Vdac, lengthening the settling time even further and also often resulting in additional power consumption. Of course, the response of the power converter to negative voltage transitions exhibits similar non-ideal behavior.
As mentioned above, modern electronic systems and thus the power converters and voltage regulators implemented in those systems are being asked to closely and rapidly control the delivery of power, under such control schemes as Adaptive Voltage Scaling and the like. The effects of propagation delays and system dynamics in limiting the response of conventional power management systems, as described above relative to FIGS. 1b and 1c, thus hinder the ability to achieve the power savings and efficiencies desired for many of these modern systems.